Relative importance of solder and wire bond defects on the maximum junction temperature of IGBT devices. (November 2021)

• Record Type: Journal Article
• Authors: Pichon, P.-Y.; Brandelero, J.
• Is Part Of: Microelectronics and reliability. Volume 126(2021)
• Publication Date: 2021-11
• Subjects: Solder -- Wirebonds -- IGBT -- Power electronics packaging -- Reliability -- Failure -- Short circuit -- Thermal Runaway -- Temperature resistance -- Solder voiding; Electronic apparatus and appliances -- Reliability -- Periodicals; Miniature electronic equipment -- Periodicals; Appareils électroniques -- Fiabilité -- Périodiques; Équipement électronique miniaturisé -- Périodiques; Electronic apparatus and appliances -- Reliability; Miniature electronic equipment; Periodicals; 621.3815
• DOI: 10.1016/j.microrel.2021.114250
• Languages: English
• ISSNs: 0026-2714

Abstract

Abstract: The wear-out of interconnection packaging materials of Insulated-Gate Bipolar Transistors (IGBTs) during power cycling in Pulse Width Modulation (PWM) mode can induce a local temperature increase on the die surface, resulting in thermal runaway, and ultimately short-circuit failure. In this study, the effect of PWM power cycling on solder and wire bond aging states as well as on the surface temperature distribution and thermal resistance was measured by infrared camera and compared with microstructural analysis. Horizontal cracks in the solder close to the solder-die interface induced the highest thermal resistance increase. Comparatively, the impact of solder voids on the thermal resistance was lower, but this caused significant bow of the die due to solder redistribution. This may contribute to an increased stress intensity factor at the die edges and thus horizontal crack formation. Lift-off bonds can also locally increase the die surface temperature due to Joule heating at imperfect electrical contacts. Analytical expressions validated by measurements and electro-thermal Finite Element Modeling were developed to estimate the relative importance of the different defects for a wider range of module designs and operating conditions. Highlights: The impact of different wear-out defects on the die temperature distribution is compared. Horizontal cracks close to the solder-die interface increase the temperature most significantly. Solder voiding and wirebond at end-of-life also induce in a measurable local temperature increase. Overlapping defects can result in chip overheating, thermal runaway and finally, short-circuit.