Relaxing non-volatility for energy-efficient DMTJ based cryogenic STT-MRAM. (October 2021)

• Record Type: Journal Article
• Authors: Garzón, Esteban; De Rose, Raffaele; Crupi, Felice; Trojman, Lionel; Teman, Adam; Lanuzza, Marco
• Is Part Of: Solid-state electronics. Volume 184(2021)
• Publication Date: 2021-10
• Subjects: Double-barrier magnetic tunnel junction (DMTJ) -- STT-MRAM -- Cryogenic computing -- Thermal stability relaxation -- 77 K; Semiconductors -- Periodicals; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.sse.2021.108090
• Languages: English
• ISSNs: 0038-1101

Abstract

Highlights: STT-MRAMs based on double-barrier MTJ (DMTJ) operating at cryogenic temperatures (77 K). DMTJs with reduced thermal stability that ensure stable states at 77 K. DMTJ devices with relaxed non-volatility allow improved energy and performance at 77 K. Energy efficiency (>35%) under write/read accesses is achieved in contrast to 6T-SRAM. Abstract: Spin-transfer torque magnetic random-access memory (STT-MRAM) is considered as a premiere candidate for replacing conventional six-transistors static random-access memory (6T-SRAM) in processor caches. This paper explores STT-MRAMs based on double-barrier magnetic tunnel junction with two reference layers (DMTJ), while operating at cryogenic temperatures (77 K). To deal with large dynamc energy and long latency of write operation, we suggest to significantly relax the non-volatility requirement of DMTJ devices at room temperature by reducing the cross-section area, while maintaining the typical 10-years retention time at the target operating temperature. This leads the cryogenic DMTJ-based STT-MRAM to be more energy-efficient than its 6T-SRAM counterpart under both read and write operations, while exhibiting smaller area footprint.