Digital excess loop delay compensation for high speed delta–sigma modulators. Issue 15 (9th July 2015)

• Record Type: Journal Article
• Authors: Jabbour, C.; Nguyen, V.T.; Srini, V.; Aggarwal, S.
• Is Part Of: Electronics letters. Volume 51:Issue 15(2015)
• Page Start: 1155
• Page End: 1157
• Publication Date: 2015-07-09
• Subjects: compensation -- delta‐sigma modulation -- modulators -- circuit feedback -- comparators (circuits) -- delay circuits; digital excess loop delay compensation -- high speed delta‐sigma modulator -- ELD compensation feedback -- digital output computation -- comparator sharing approach -- quantiser; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2015.0949
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : A digital excess loop delay (ELD) compensation suited for high speed delta–sigma modulators is presented. Its operation is based on computing the digital outputs for all the possible values of the ELD compensation feedback and performing the selection in the digital domain. The proposed technique also uses a novel comparator sharing approach which minimises the number of comparators needed in the quantiser.