Digital excess loop delay compensation for high speed delta–sigma modulators. Issue 15 (9th July 2015) - Jabbour, C.; Nguyen, V.T.; Srini, V.; Aggarwal, S.
Abstract : A digital excess loop delay (ELD) compensation suited for high speed delta–sigma modulators is presented. Its operation is based on computing the digital outputs for all the possible values of the ELD compensation feedback and performing the selection in the digital domain. The proposed technique also uses a novel comparator sharing approach which minimises the number of comparators needed in the quantiser.