An Empirical Investigation on System and Statement Level Parallelism Strategies for Accelerating Scatter Search Using Handel-C and Impulse-C. (1st February 2012)

• Record Type: Journal Article
• Authors: Walton, M.; Ahmed, O.; Grewal, G.; Areibi, S.
• Other Names: Peterson Gregory Academic Editor.
• Is Part Of: VLSI design. Volume 2012(2012)
• Publication Date: 2012-02-01
• Subjects: Integrated circuits -- Very large scale integration -- Periodicals; 621.395
• DOI: 10.1155/2012/793196
• Languages: English
• ISSNs: 1065-514X

Abstract

Abstract : Scatter Search is an effective and established population-based metaheuristic that has been used to solve a variety of hard optimization problems. However, the time required to find high-quality solutions can become prohibitive as problem sizes grow. In this paper, we present a hardware implementation of Scatter Search on a field-programmable gate array (FPGA) . Our objective is to improve the run time of Scatter Search by exploiting the potentially massive performance benefits that are available through the native parallelism in hardware. When implementing Scatter Search we employ two different high-level languages (HLLs) : Handel-C and Impulse-C. Our empirical results show that by effectively exploiting source-code optimizations, data parallelism, and pipelining, a 28x speed up over software can be achieved.