An Approach for Implementing State Machines with Online Testability. (28th April 2010)

• Record Type: Journal Article
• Authors: Lala, P. K.; Mathews, A.; Parkerson, J. P.
• Other Names: Parekhji Rubin Academic Editor.
• Is Part Of: VLSI design. Volume 2010(2010)
• Publication Date: 2010-04-28
• Subjects: Integrated circuits -- Very large scale integration -- Periodicals; 621.395
• DOI: 10.1155/2010/639747
• Languages: English
• ISSNs: 1065-514X

Abstract

Abstract : During the last two decades, significant amount of research has been performed to simplify the detection of transient or soft errors in VLSI-based digital systems. This paper proposes an approach for implementing state machines that uses 2-hot code for state encoding. State machines designed using this approach allow online detection of soft errors in registers and output logic. The 2-hot code considerably reduces the number of required flip-flops and leads to relatively straightforward implementation of next state and output logic. A new way of designing output logic for online fault detection has also been presented.