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HARVARD Citation
Yan, A. et al. (2021). Dual-modular-redundancy and dual-level error-interception based triple-node-upset tolerant latch designs for safety-critical applications. Microelectronics journal. p. . [Online].
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Yan, A. et al. (2021). Dual-modular-redundancy and dual-level error-interception based triple-node-upset tolerant latch designs for safety-critical applications. Microelectronics journal. p. . [Online].