Two modified SVPWM algorithms for common‐mode voltage reduction in eight‐switch three‐phase inverters. Issue 10 (1st May 2017)

• Record Type: Journal Article
• Authors: Liu, Yong‐Chao; Ge, Xinglai; Tang, Qidi; Gou, Bin
• Is Part Of: Electronics letters. Volume 53:Issue 10(2017)
• Page Start: 676
• Page End: 678
• Publication Date: 2017-05-01
• Subjects: PWM invertors; M‐SVPWM algorithm -- common‐mode voltage reduction -- eight‐switch three‐phase inverters -- CMV reduction -- switching states -- post‐fault reconfigured topology -- three‐level neutral‐point‐clamped inverter -- open‐circuit fault -- ESTPI -- modified space vector pulse‐width modulation; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2017.0678
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : The relationship between common‐mode voltages (CMVs) and switching states in the post‐fault reconfigured topology of the three‐level neutral‐point‐clamped inverter with open‐circuit fault in a leg, which is named eight‐switch three‐phase inverter (ESTPI), is revealed, and based on that, two modified space vector pulse‐width modulation (M‐SVPWM) algorithms for the CMV reduction in the ESTPI are proposed. The maximum CMV of the ESTPI with two proposed M‐SVPWM algorithms is only half of that with two conventional SVPWM algorithms. Experimental results have shown the effectiveness of two proposed M‐SVPWM algorithms.