Two modified SVPWM algorithms for common‐mode voltage reduction in eight‐switch three‐phase inverters. Issue 10 (1st May 2017) - Liu, Yong‐Chao; Ge, Xinglai; Tang, Qidi; Gou, Bin
Abstract : The relationship between common‐mode voltages (CMVs) and switching states in the post‐fault reconfigured topology of the three‐level neutral‐point‐clamped inverter with open‐circuit fault in a leg, which is named eight‐switch three‐phase inverter (ESTPI), is revealed, and based on that, two modified space vector pulse‐width modulation (M‐SVPWM) algorithms for the CMV reduction in the ESTPI are proposed. The maximum CMV of the ESTPI with two proposed M‐SVPWM algorithms is only half of that with two conventional SVPWM algorithms. Experimental results have shown the effectiveness of two proposed M‐SVPWM algorithms.