Electrical characterization of high k-dielectrics for 4H-SiC MIS devices. (1st August 2019)

• Record Type: Journal Article
• Authors: Khosa, R.Y.; Chen, J.T.; Winters, M.; Pálsson, K.; Karhu, R.; Hassan, J.; Rorsman, N.; Sveinbjӧrnsson, E.Ö.
• Is Part Of: Materials science in semiconductor processing. Volume 98(2019)
• Page Start: 55
• Page End: 58
• Publication Date: 2019-08-01
• Subjects: Interface traps -- AlN/4H-SiC interface -- Al2O3/4H-SiC interface -- MIS structure; Semiconductors -- Periodicals; Integrated circuits -- Materials -- Periodicals; Semiconducteurs -- Périodiques; Circuits intégrés -- Matériaux -- Périodiques; Electronic journals; 621.38152
• DOI: 10.1016/j.mssp.2019.03.025
• Languages: English
• ISSNs: 1369-8001

Abstract

Abstract: We report promising results regarding the possible use of AlN or Al2 O3 as a gate dielectric in 4H-SiC MISFETs. The crystalline AlN films are grown by hot wall metal organic chemical vapor deposition (MOCVD) at 1100 °C. The amorphous Al2 O3 films are grown by repeated deposition and subsequent low temperature (200 °C) oxidation of thin Al layers using a hot plate. Our investigation shows a very low density of interface traps at the AlN/4H-SiC and the Al2 O3 /4H-SiC interface estimated from capacitance-voltage (CV) analysis of MIS capacitors. Current-voltage (IV) analysis shows that the breakdown electric field across the AlN or Al2 O3 is ∼ 3 MV/cm or ∼ 5 MV/cm respectively. By depositing an additional SiO2 layer by plasma enhanced chemical vapor deposition at 300 °C on top of the AlN or Al2 O3 layers, it is possible to increase the breakdown voltage of the MIS capacitors significantly without having pronounced impact on the quality of the AlN/SiC or Al2 O3 /SiC interfaces.