Impact of interface trap charges on electrical performance characteristics of a source pocket engineered Ge/Si heterojunction vertical TFET with HfO2/Al2O3 laterally stacked gate oxide. (April 2021)

• Record Type: Journal Article
• Authors: Tripathy, Manas Ranjan; Samad, A.; Singh, Ashish Kumar; Singh, Prince Kumar; Baral, Kamalaksha; Mishra, Ashwini Kumar; Jit, Satyabrata
• Is Part Of: Microelectronics and reliability. Volume 119(2021)
• Publication Date: 2021-04
• Subjects: Vertical TFET -- Ge/Si heterojunction -- Source pocket -- Heterogeneous gate oxide -- Sub-threshold swing -- Interface trap charges; Electronic apparatus and appliances -- Reliability -- Periodicals; Miniature electronic equipment -- Periodicals; Appareils électroniques -- Fiabilité -- Périodiques; Équipement électronique miniaturisé -- Périodiques; Electronic apparatus and appliances -- Reliability; Miniature electronic equipment; Periodicals; 621.3815
• DOI: 10.1016/j.microrel.2021.114073
• Languages: English
• ISSNs: 0026-2714

Abstract

Abstract: This work reports the impact of interface trap charges (ITCs) on the electrical performance characteristics of a source pocket engineered (SPE) Ge/Si heterojunction (HJ) vertical TFET (V-TFET) with an HfO2 /Al2 O3 laterally stacked heterogeneous gate oxide (LSHGO) structure. SILVACO ATLAS™ 3-D TCAD tool has been used to compare various electrical performance parameters which includes DC parameters (i.e. ION, IOFF, ION /IOFF and subthreshold swing), RF figures of merit (i.e. transconductance, output conductance, cut-off frequency, the maximum frequency of oscillation, transit time, gain bandwidth product, transconductance generation factor (device efficiency) and transconductance frequency product) and linearity figures of merit (i.e. gm2, gm3, Third order voltage intercept point (VIP3), third intercept input power (IIP3), third order intermodulation distortion power (IDM3), 1-dB compression point and zero crossover point (ZCP)) of the proposed Ge/Si SPE-HJ-LSHGO-V-TFET with their corresponding values of SPE-HJ-V-TFET with only Al2 O3 as the gate oxide for both donor (+ve) and acceptor (−ve) interface trap charges at the gate oxide/channel interface. The reported study shows that the proposed HfO2 /Al2 O3 based SPE-HJ-LSHGO-V-TFET device is more immune to ITCs than the SPE-HJ-V-TFET device with only Al2 O3 as the gate oxide. Highlights: Interface trap charges impact on electrical parameters have been analysed for Ge/Si vertical TFET with and without heterogeneous gate oxide. Interface trap charges (ITCs) with acceptor and donor impurities are introduced with uniform distribution in the oxide-channel interface. Electrical parameters have been investigated in terms of DC parameters, RF and linearity figures of merit for both the TFETs. The reported study shows that the proposed HfO2 /Al2 O3 based vertical TFET is more immune to ITCs than the only Al2 O3 based vertical TFET.