P‐1.9: The Effect of Lateral Capacitance on Flat‐Panel Display with Gate Driver Circuits Integrated in Active Area. (24th February 2021)

• Record Type: Journal Article
• Authors: Xu, Shangjun; Wang, Mingxin; Wang, Zhijun; Zhou, Liufei; Shu, Yang; Yuan, Ling; Bian, Cunjian; Fei, Mi; Wang, Lizhong; Wang, Huaipei; Liu, Deyu
• Is Part Of: Digest of technical papers. Volume 52(2021)Supplement 1
• Page Start: 436
• Page End: 438
• Publication Date: 2021-02-24
• Subjects: Lateral Capacitance -- GOA in AA -- Narrow Bezel; Information display systems -- Congresses; 621.3815422
• DOI: 10.1002/sdtp.14513
• Languages: English
• ISSNs: 0097-966X

Abstract

Abstract : A highly integrated display panel, in which gate driving circuit was totally integrated in active area, was designed and lit up. The issue of this panel, caused by lateral capacitance between clock signal line and source line, was studied systemically. The results provide reference for the development of higher integrated and more intelligent panel in the future.