P‐1.9: The Effect of Lateral Capacitance on Flat‐Panel Display with Gate Driver Circuits Integrated in Active Area. (24th February 2021) - Xu, Shangjun; Wang, Mingxin; Wang, Zhijun; Zhou, Liufei; Shu, Yang; Yuan, Ling; Bian, Cunjian; Fei, Mi; Wang, Lizhong; Wang, Huaipei; Liu, Deyu
Abstract : A highly integrated display panel, in which gate driving circuit was totally integrated in active area, was designed and lit up. The issue of this panel, caused by lateral capacitance between clock signal line and source line, was studied systemically. The results provide reference for the development of higher integrated and more intelligent panel in the future.