Cite
HARVARD Citation
Hoentschel, J. et al. (2017). (Invited) VLSI-CMOS Device Technology Scaling Landscape Based on Fully-Depleted SOI and 3D-FinFET Technologies for the Internet of Everything Era. ECS transactions. pp. 3-15. [Online].
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Hoentschel, J. et al. (2017). (Invited) VLSI-CMOS Device Technology Scaling Landscape Based on Fully-Depleted SOI and 3D-FinFET Technologies for the Internet of Everything Era. ECS transactions. pp. 3-15. [Online].