Gate-damage accumulation and off-line recovery in SiC power MOSFETs with soft short-circuit failure mode. (November 2020)

• Record Type: Journal Article
• Authors: Castellazzi, A.; Richardeau, F.; Borghese, A.; Boige, F.; Fayyaz, A.; Irace, A.; Guibaud, G.; Chazal, V.
• Is Part Of: Microelectronics and reliability. Volume 114(2020)
• Publication Date: 2020-11
• Subjects: Damage accumulation and recovery -- Hopping-home mode -- Short-circuit robustness -- SiC power MOSFET; Electronic apparatus and appliances -- Reliability -- Periodicals; Miniature electronic equipment -- Periodicals; Appareils électroniques -- Fiabilité -- Périodiques; Équipement électronique miniaturisé -- Périodiques; Electronic apparatus and appliances -- Reliability; Miniature electronic equipment; Periodicals; 621.3815
• DOI: 10.1016/j.microrel.2020.113943
• Languages: English
• ISSNs: 0026-2714

Abstract

Abstract: This paper proposes the detailed analysis of the short-circuit failure mechanism of a particular class of silicon carbide (SiC) power MOSFETs, exhibiting a safe fail-to-open-circuit type signature. The results are based on extensive experimental testing, including both functional and structural characterisation of the transistors, specifically devised to bring along gradual degradation and progressive damage accumulation. It is shown that the soft failure feature is associated with degradation and eventual partial shorting of the gate-source structure. Moreover, partial recovery, induced here by ad-hoc off-line biasing, is observed on degraded components. The results indicate that it is a realistic new option for deployment in the application to yield enhanced system level robustness and system-level hopping-home operational mode capability, of great importance in a number of reliability critical domains, such as, for instance, transportation.