Dynamic optical beam induced current variation mapping: A fault isolation technique. (April 2020)

• Record Type: Journal Article
• Authors: Thor, M.H.; Goh, S.H.; Yeoh, B.L.; Hao, Hu; Chan, Y.H.; Lin, Zhao
• Is Part Of: Microelectronics and reliability. Volume 107(2020)
• Publication Date: 2020-04
• Subjects: Dynamic electrical fault isolation -- Optical beam induced current (OBIC) -- Laser-assisted Device Alteration (LADA) -- Cross correlation -- Digital pixel binning; Electronic apparatus and appliances -- Reliability -- Periodicals; Miniature electronic equipment -- Periodicals; Appareils électroniques -- Fiabilité -- Périodiques; Équipement électronique miniaturisé -- Périodiques; Electronic apparatus and appliances -- Reliability; Miniature electronic equipment; Periodicals; 621.3815
• DOI: 10.1016/j.microrel.2020.113603
• Languages: English
• ISSNs: 0026-2714

Abstract

Abstract: In this paper, we describe the concept and applications of a dynamic laser stimulation technique based on optical beam-induced current (OBIC) variation mapping for global fault localization. A production tester exercised the chip dynamically while a 1064 nm wavelength laser interrogates the devices in the region of interest from the chip backside. OBIC variations at different test cycles are recorded for every scanned pixel and translated into a current profile. A post-processing scheme then determines the suspected defect location. Unlike laser-assisted device-alteration (LADA) which uses the same laser, this technique applies to hard defects localization. Five case studies will be presented as proof of concept. Highlights: Concept and applications of a new dynamic laser stimulation technique based on optical beam-induced current (OBIC) variation mapping Fault isolation is accomplished by applying an offline post-processing scheme to the OBIC profiles to discriminate abnormal sites Post-processing scheme can be either thresholding or a combination of digital pixel binning and cross-correlation This technique has been proven effective on both open and short defects on embedded memory and ATPG's real test cases Key advantage lies in reuse of readily available production test patterns and does not require any additional detection system