Electrical properties of the HfO2/Al2O3 dielectrics stacked using single- and dual-temperature atomic-layer deposition processes on In0.53Ga0.47As. (16th September 2019)

• Record Type: Journal Article
• Authors: Lee, Changmin; Choi, Sungho; An, Youngseo; An, Byeong-Seon; Lee, Woohui; Oh, Wan; Eom, Deokjoon; Lee, Jehoon; Yang, Cheol-Woong; Kim, Hyoungsub
• Is Part Of: Semiconductor science and technology. Volume 34:Number 10(2019)
• Publication Date: 2019-09-16
• Subjects: HfO2 -- Al2O3 -- In0.53Ga0.47As -- atomic-layer deposition -- dual-temperature process; Semiconductors -- Periodicals; 621.38152
• DOI: 10.1088/1361-6641/ab3bec
• Languages: English
• ISSNs: 0268-1242

Abstract

Abstract: For sequential stacking of an Al2 O3 passivation layer and a main HfO2 gate dielectric layer on In0.53 Ga0.47 As, we used single- and dual-temperature atomic-layer deposition processes, and systematically compared their effects on the dielectric-related electrical properties. When the deposition of Al2 O3 passivation layer (approximately 0.7−0.8 nm) took place at relatively low temperatures of 100 °C, an increase in the subsequent deposition temperature for HfO2 (from 100 to 300 °C) assisted in decreasing both capacitance-equivalent oxide thickness and the number of bulk-related traps. However, the valuable reduction in both near-interface defect density and leakage current through the low-temperature Al2 O3 passivation approach was monotonically lessened with an increase in the process temperature for the subsequent HfO2 deposition, which suggests the need for a careful optimization of a thermal budget for the dual-temperature process.