Schottky Barrier Thin Film Transistor (SB-TFT) on low-temperature polycrystalline silicon. (December 2016)

• Record Type: Journal Article
• Authors: De Iacovo, A.; Ferrone, A.; Colace, L.; Minotti, A.; Maiolo, L.; Pecora, A.
• Is Part Of: Solid-state electronics. Volume 126(2016)
• Page Start: 1
• Page End: 4
• Publication Date: 2016-12
• Subjects: Schottky barrier FET -- Thin film transistor -- Polycrystalline silicon; Semiconductors -- Periodicals; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.sse.2016.10.001
• Languages: English
• ISSNs: 0038-1101

Abstract

Highlights: Schottky barrier field effect transistors on polycrystalline silicon are proposed. Vt and SS comparable with similar MOS TFT reported in literature. Low thermal budget process, compatible with polymeric substrates. Cheaper and scalable alternative to transistors with doped source and drain. Abstract: We report on the fabrication and characterization of Schottky barrier transistors on polycrystalline silicon. The transistors were realized exploiting Cr-Si and Ti-Si Schottky barrier with a low thermal budget process, compatible with polymeric, ultraflexible substrates. We obtained devices with threshold voltages as low as 1.7 V (for n channel) and 4 V (for p channel) with channel lengths ranging from 2 to 40 μm. Resulting on/off ratios are as high as 5 · 10 3 . The devices showed threshold voltages and subthreshold slopes comparable with already published N- and P-MOS devices realized with the same process on polyimide substrates thus representing a cheaper and scalable alternative to ultraflexible transistors with doped source and drain.