Deep levels in metal–oxide–semiconductor capacitors fabricated on n-type In0.53Ga0.47As lattice matched to InP substrates. (21st June 2019)

• Record Type: Journal Article
• Authors: Simoen, E; Hsu, P-C; Alian, A; El Kazzi, S; Wang, C
• Is Part Of: Semiconductor science and technology. Volume 34:Number 7(2019)
• Publication Date: 2019-06-21
• Subjects: DLTS -- InGaAs -- MOS capacitor -- antisite defects; Semiconductors -- Periodicals; 621.38152
• DOI: 10.1088/1361-6641/ab2481
• Languages: English
• ISSNs: 0268-1242

Abstract

Abstract: In this work, deep levels present in n-type In0.53 Ga0.47 As hetero-epitaxial layers grown lattice-matched on n-type InP substrates by molecular beam epitaxy have been studied by deep-level transient spectroscopy (DLTS). Metal–oxide–semiconductor capacitors are employed, based on an Al2 O3 gate oxide. It is shown that a single, near mid-gap electron trap dominates the DLT-spectra, whatever the surface pre-or post-gate oxide deposition treatment. At the same time, it is shown that the deep level parameters vary significantly from capacitor to capacitor and from wafer to wafer. Only after Forming Gas Annealing, a stable value for the activation energy of 0.39 ± 0.01 eV is obtained. These results are tentatively interpreted in terms of antisite defects in the epitaxial layer, which form a family of related complexes with close deep-level parameters.