Cite
HARVARD Citation
Dey, S. et al. (2020). Design and simulation of vertically-stacked nanowire transistors at 3 nm technology nodes. Physica scripta. p. . [Online].
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Dey, S. et al. (2020). Design and simulation of vertically-stacked nanowire transistors at 3 nm technology nodes. Physica scripta. p. . [Online].