Post-process porous silicon for 5G applications. (June 2020)

• Record Type: Journal Article
• Authors: Scheen, Gilles; Tuyaerts, Romain; Rack, Martin; Nyssens, Lucas; Rasson, Jonathan; Nabet, Massinissa; Raskin, Jean-Pierre
• Is Part Of: Solid-state electronics. Volume 168(2020)
• Publication Date: 2020-06
• Subjects: Effective permittivity -- Effective resistivity -- Microwave losses -- Porous silicon (PSi) -- CMOS compatibility -- RF substrate -- Silicon-on-insulator (SOI) technology; Semiconductors -- Periodicals; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.sse.2019.107719
• Languages: English
• ISSNs: 0038-1101

Abstract

Abstract: The interest of 5G in centimeter and millimeter waves relies on large blocks of available spectra and thus increased bandwidth. At these frequencies, the dielectric and conductive losses of the substrate can greatly degrade the performances of RF circuits. With high electrical resistivity and low relative permittivity, porous silicon is an ideal candidate as a high-quality RF substrate. This paper presents an innovative technique of post device fabrication integration of porous silicon (POST-PSi) with the substrate. The frontside is not involved in porous layer growth and therefore the integrity of the RF circuitry is not impacted by the POST-PSi process. A comparison of the RF performances with benchmark trap-rich (TR) RF silicon substrate is presented. In addition to its compatibility with standard microfabrication processes and stable final structure, POST-PSi provides characteristics of low losses, high isolation and very high linearity, unmatched by any other silicon-based substrate. Finally, the substrate's RF performance is evaluated at high temperature, and POST-PSi substrate linearity is shown to remain sufficiently high for RF and 5G applications up to 175 °C.