Hafnia and alumina stacks as UTBOXs in silicon-on insulator. (June 2020)

• Record Type: Journal Article
• Authors: Popov, V.P.; Antonov, V.A.; Gutakovskiy, A.K.; Tyschenko, I.E.; Vdovin, V.I.; Miakonkikh, A.V.; Rudenko, K.V.
• Is Part Of: Solid-state electronics. Volume 168(2020)
• Publication Date: 2020-06
• Subjects: Hafnia and alumina high-k BOX -- Ferroelectric phase -- SOI pseudo-MOSFETs -- Interface states -- Interface polarization; Semiconductors -- Periodicals; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.sse.2019.107734
• Languages: English
• ISSNs: 0038-1101

Abstract

Highlights: In SOI pseudo-MOSFETs with 20 nm hafnia alumina interlayers show normal gate-drain characteristics after an RTA ≥ 950 °C with the charge-carrier mobilities below the same in a thick silica BOX. A highly stable ferroelectric hysteresis was observed in the case of SOI pseudo-MOSFETs with high oxygen vacancy concentrations in the UTBOX HfO2 /Al2 O3 stack after a furnace annealing ≥ 900 °C due to the formation of the SiOx interlayers between silicon and high-k stacks. The formation of a HfO2 film, having ferroelectric phase OI ( Pca21 ), is stabilized by a compressive stress in the case of SOS pseudo-MOSFETs. Abstract: PEALD-grown hafnia and alumina buried oxide (BOX) stacks in silicon-on-insulator (SOI) structures were produced and characterized by XTEM and pseudo-MOSFET techniques. The ferroelectric phases of hafnia were observed by XTEM and SAED. It was shown that the minimal interface states density (IFS) < 10 12 cm −2 and the maximal one with a memory window MW ~1 V could be obtained by the right choice of high-k dielectric layer sequence in BOX stack and thermal processing.