Improvement of SiO2/4H-SiC Interface properties by post-metallization annealing. (May 2018)

• Record Type: Journal Article
• Authors: Lei, Y.M.; Wakabayashi, H.; Tsutsui, K.; Iwai, H.; Furuhashi, M.; Tomohisa, S.; Yamakawa, S.; Kakushima, K.
• Is Part Of: Microelectronics and reliability. Volume 84(2018)
• Page Start: 226
• Page End: 229
• Publication Date: 2018-05
• Subjects: Electronic apparatus and appliances -- Reliability -- Periodicals; Miniature electronic equipment -- Periodicals; Appareils électroniques -- Fiabilité -- Périodiques; Équipement électronique miniaturisé -- Périodiques; Electronic apparatus and appliances -- Reliability; Miniature electronic equipment; Periodicals; 621.3815
• DOI: 10.1016/j.microrel.2018.03.036
• Languages: English
• ISSNs: 0026-2714

Abstract

Abstract: Electrical characteristics of SiC metal-oxide-semiconductor (MOS) capacitors with atomic-layer-deposited SiO2 (ALD-SiO2 ) gate dielectrics were investigated. Post-metallization annealing (PMA) with W gate electrodes at 950 °C showed a large recovery in the flatband voltage toward the ideal value and the hysteresis was reduced to 36 mV. Interface state density ( D it ) of 3 × 10 11 cm −2 /eV was obtained after the PMA for 5 × 10 3 s. The concentration of the residual carbon atoms in the SiO2 gate dielectrics has been reduced after annealing, suggesting one of the possible origins of the improvements. Highlights: Post-metallization annealing (PMA) improves the interface of SiO2 /SiC. Residual carbon atoms in the atomic layer deposited SiO2 can be reduced. Hysteresis was reduced to 36 mV. A low interface state density of 3x10 11 cm-2/eV was achieved.