Performance of differential pair circuits designed with line tunnel FET devices at different temperatures. (6th June 2018)

• Record Type: Journal Article
• Authors: Martino, M D V; Martino, J A; Agopian, P G D; Rooyackers, R; Simoen, E; Collaert, N; Claeys, C
• Is Part Of: Semiconductor science and technology. Volume 33:Number 7(2018:Jul.)
• Publication Date: 2018-06-06
• Subjects: differential pair -- analog performance -- FinFET -- Line TFET -- Point TFET; Semiconductors -- Periodicals; 621.38152
• DOI: 10.1088/1361-6641/aac4fd
• Languages: English
• ISSNs: 0268-1242

Abstract

Abstract: This work studies differential pair circuits designed with Line tunnel field effect transistors (TFETs), comparing their suitability with conventional Point TFETs. Differential voltage gain ( A d ), compliance voltage and sensitivity to channel length mismatch are analyzed experimentally for different temperatures. The first part highlights individual characteristics of Line TFETs, focusing on behaviors that affect analog circuits. In comparison to Point TFETs, Line TFETs present higher drive current, better transconductance and worse output conductance. In the second part, differential pairs are studied at room temperature for different dimensions and bias conditions. Line TFETs present the highest A d, while Point TFET decrease the susceptibility to channel length mismatch. In the last part, the temperature impact is investigated. Based on the activation energy, the impact of band-to-band tunneling and trap-assisted tunneling is discussed for different bias conditions. A general equation is proposed, including the technology and the susceptibility to temperature and dimensions. It was observed that Line TFETs are a good option to design differential pairs with higher A d and ON-state current than Point TFETs.