Correlation between memory characteristics and energy band bending resulted from composition distribution of trapping layer for charge trap memory. (25th October 2018)

• Record Type: Journal Article
• Authors: Tang, Zhenjie; Li, Rong; Zhang, Xiwei; Geng, Huijuan; Zang, Shuaipu; Zheng, Huiyuan; Lian, Mengchen; Hu, Niannian
• Is Part Of: Semiconductor science and technology. Volume 33:Number 12(2018:Dec.)
• Publication Date: 2018-10-25
• Subjects: composition distribution modulation -- energy band bending -- additional potential barrier -- memory device -- atomic layer chemical vapor deposition; Semiconductors -- Periodicals; 621.38152
• DOI: 10.1088/1361-6641/aae75e
• Languages: English
• ISSNs: 0268-1242

Abstract

Abstract: Charge trap memory devices with Zr x Si1– x O2 films as charge trapping layer consisting of nine [(ZrO2 ) m (SiO2 ) n (ZrO2 ) m (SiO2 ) n ] units have been fabricated and investigated. The composition distribution was modulated by controlling the m and n values in each unit. It is observed that the variation of composition distribution can induce the energy band bending and additional potential barrier, which significantly improve the program/erase speed and data retention characteristics as well as extending the temperature insensitive range. When the effective potential barrier including classic potential barrier and additional potential barrier is 1.52 eV, the memory device exhibits a lower charge loss of 4.5% at 200 °C over a period of 10 4 s, a wider temperature insensitive range of 20 °C–111 °C, and a faster program time of 4.0 × 10 −5 s achieving +6 V flat band voltage shift. The effective potential barrier values should be in the range of 1.52–1.36 eV, taking into consideration the trade-off between the retention and program/erase speed. The additional potential barrier can increase the electron tunneling distance in the directions of tunneling layer and blocking layer, giving rise to recapture process and temperature insensitive of retention characteristics. In addition, the additional potential barrier decreases the electron tunneling distance arriving trapping layer conduction band, improving the program speed. The results provide a reference to trapping layer composition distribution for future charge trap memory applications.