Field emission from graphene sheets and its application in floating gate memories. (24th October 2018)

• Record Type: Journal Article
• Authors: Nashed, R; Pan, C; Brenner, K; Naeemi, A
• Is Part Of: Semiconductor science and technology. Volume 33:Number 12(2018:Dec.)
• Publication Date: 2018-10-24
• Subjects: 2D NAND -- non-volatile memory -- CVD graphene -- field emission; Semiconductors -- Periodicals; 621.38152
• DOI: 10.1088/1361-6641/aae626
• Languages: English
• ISSNs: 0268-1242

Abstract

Abstract: The potential performance of 2D NAND flash with a graphene floating gate (FG) layer is presented. The field enhancement factor for patterned CVD graphene sheets atop a tunneling dielectric is experimentally extracted and used to drive higher-level circuit simulations on 64-bit NAND strings. The average field enhancement factor at a barrier height of 3.1 eV was found to be ∼2.85 with a maximum value of 4. Our modest extracted β value explains the contradiction in prior experiments that reported a field enhancement factor of few thousands but only 30%–40% improvement in the write voltage of FG memory devices. Design and operational tradeoffs are benchmarked based on these experimental values and it is shown that 2D NAND programming time and/or programming voltage can be suppressed to 10 ns and 5 V, respectively, based on a 65 nm process node. The onset of read disturbs from the more efficient FG layer are identified and shown to be easily mitigated through error correction code.