Internal current amplification induced by dielectric hole trapping in monolayer MoS2 transistor. (31st October 2017)

• Record Type: Journal Article
• Authors: Liu, Pang-Shiuan; Lin, Ching-Ting; Hudec, Boris; Hou, Tuo-Hung
• Is Part Of: Nanotechnology. Volume 28:Number 47(2017)
• Publication Date: 2017-10-31
• Subjects: two-dimensional transition-metal dichalcogenides (TMDs) -- current amplification -- charge trapping -- subthreshold slope; Nanotechnology -- Periodicals; Nanotechnology -- Periodicals; Nanotechnology; Publications périodiques; Nanotechnologies; Periodicals; 620.5
• DOI: 10.1088/1361-6528/aa8fb0
• Languages: English
• ISSNs: 0957-4484

Abstract

Abstract: Carrier transport in layered transition-metal dichalcogenides is highly sensitive to surrounding charges because of the atomically thin thickness. By exploiting this property, we report a new internal current amplification mechanism through positive feedback induced by dielectric hole trapping in a MoS2 back-gate transistor on a tantalum oxide substrate. The device exhibits an extremely steep subthreshold slope of 17 mV/decade, which is strongly dependent on the substrate material and drain bias. The steep subthreshold slope is attributed to the internal current amplification arising from the positive feedback between hole generation in MoS2 triggered by large lateral electric field and Schottky barrier narrowing induced by localized hole trapping in tantalum oxide near the source contact.