Failure signature analysis of power-opens in DDR3 SDRAMs. (September 2018)

• Record Type: Journal Article
• Authors: Li, Tan; Lee, Hosung; Bak, Geunyong; Baeg, Sanghyeon
• Is Part Of: Microelectronics and reliability. Volume 88/90(2018)
• Page Start: 277
• Page End: 281
• Publication Date: 2018-09
• Subjects: Power pin -- Open defect -- Power integrity -- VDD bounce -- Power distribution; Electronic apparatus and appliances -- Reliability -- Periodicals; Miniature electronic equipment -- Periodicals; Appareils électroniques -- Fiabilité -- Périodiques; Équipement électronique miniaturisé -- Périodiques; Electronic apparatus and appliances -- Reliability; Miniature electronic equipment; Periodicals; 621.3815
• DOI: 10.1016/j.microrel.2018.06.104
• Languages: English
• ISSNs: 0026-2714

Abstract

Abstract: Open defects in power pins can only be diagnosed indirectly, and these diagnoses are a challenging task in failure analysis due to the failure signature's aliasing to other issues. Open defects cannot be detected by traditional DC-type test methods and can remain a potential risk in stressful device operation. In this work, error signatures in power open faults are experimentally probed to better understand electrical signatures induced by power-open. The power open faults are intentionally injected into a DDR3 SDRAM test platform. The power network inside the DDR3 SDRAM is experimentally found to be asymmetrical. Power-open defects in one power pin produce a range of power noise (0–65 mV), depending on the location of the power pin. Highlights: Power open faults are intentionally injected into customized DDR3 SDRAM test platform. Error signatures in power open faults are experimentally probed. The power network inside the DDR3 SDRAM is experimentally found to be asymmetrical. Power-open defects of one power ball increased power noise for a DDR3 component.