A new multitime programmable non-volatile memory cell using high voltage NMOS. (September 2018)

• Record Type: Journal Article
• Authors: Xu, S.; Wang, H.; Wu, J.; Zheng, L.; Diao, J.
• Is Part Of: Microelectronics and reliability. Volume 88/90(2018)
• Page Start: 169
• Page End: 172
• Publication Date: 2018-09
• Subjects: Non-volatile memory (NVM) -- Multitime programmable (MTP) -- Floating gate -- Endurance -- CMOS process; Electronic apparatus and appliances -- Reliability -- Periodicals; Miniature electronic equipment -- Periodicals; Appareils électroniques -- Fiabilité -- Périodiques; Équipement électronique miniaturisé -- Périodiques; Electronic apparatus and appliances -- Reliability; Miniature electronic equipment; Periodicals; 621.3815
• DOI: 10.1016/j.microrel.2018.07.089
• Languages: English
• ISSNs: 0026-2714

Abstract

Abstract: A new multitime programmable (MTP) non-volatile memory (NVM) cell using high voltage NMOS is proposed. A PMOS transistor is used for programming, erasing, and reading, and a high voltage NMOS is used for selecting the memory cell. The memory cell has fewer number of transistors and terminals compared with the typical conventional memory cell. This reduces the area consumption and simplifies the implementation of memory's external circuit. In addition, the subthreshold swing (SS) of the memory cell is improved for larger coupling ratio. Experimental investigation on transfer characteristics, endurance, retention, and threshold voltage V TH shift and leakage current of the high voltage NMOS of the memory cell are presented. The experimental endurance behaviour of the proposed memory cell is superior to the conventional memory cell. Highlights: A novel multitime programmable memory cell using high-voltage NMOS has fewer transistors and terminals, which reduces the area consumption and simplifies the implementation of memory's external circuit. The subthreshold swing and current-degradation behavior of the memory cell is improved for larger coupling ratio. The experimental endurance behavior of the proposed memory cell is superior to the conventional memory cell.