A Robust Low-Voltage On-Chip LDO Voltage Regulator in 180 nm. (20th November 2008)

• Record Type: Journal Article
• Authors: Patri, Sreehari Rao; Krishna Prasad, K. S. R.
• Other Names: Kim Yong-Bin Academic Editor.
• Is Part Of: VLSI design. Volume 2008(2008)
• Publication Date: 2008-11-20
• Subjects: Integrated circuits -- Very large scale integration -- Periodicals; 621.395
• DOI: 10.1155/2008/259281
• Languages: English
• ISSNs: 1065-514X

Abstract

Abstract : This paper proposes a capacitor-less LDO with improved steady-state response and reduced transient overshoots and undershoots. The novelty in this approach is that the regulation is improved to a greater extent by the improved error amplifier in addition to improved transient response against five vital process corners. Also entire quiescent current required is kept below 100 μ A . This LDO voltage regulator provides a constant 1.2 V output voltage against all load currents from zero to 50 mA with a maximum voltage drop of 200 mV. It is designed and tested using Spectre, targeted to be fabricated on UMC 180 nm.