A Unified Approach to Mapping and Routing on a Network-on-Chip for Both Best-Effort and Guaranteed Service Traffic. (4th June 2007)

• Record Type: Journal Article
• Authors: Hansson, Andreas; Goossens, Kees; Rădulescu, Andrei
• Other Names: Bertozzi Davide Academic Editor.
• Is Part Of: VLSI design. Volume 2007(2007)
• Publication Date: 2007-06-04
• Subjects: Integrated circuits -- Very large scale integration -- Periodicals; 621.395
• DOI: 10.1155/2007/68432
• Languages: English
• ISSNs: 1065-514X

Abstract

Abstract : One of the key steps in Network-on-Chip-based design is spatial mapping of cores and routing of the communication between those cores. Known solutions to the mapping and routing problems first map cores onto a topology and then route communication, using separate and possibly conflicting objective functions. In this paper, we present a unified single-objective algorithm, called Unified MApping, Routing, and Slot allocation (UMARS+). As the main contribution, we show how to couple path selection, mapping of cores, and channel time-slot allocation to minimize the network required to meet the constraints of the application. The time-complexity of UMARS+ is low and experimental results indicate a run-time only20 % higher than that of path selection alone. We apply the algorithm to an MPEG decoder System-on-Chip, reducing area by33 %, power dissipation by35 %, and worst-case latency by a factor four over a traditional waterfall approach.