A Low Complexity All-Digital Background Calibration Technique for Time-Interleaved ADCs. (9th October 2016)

• Record Type: Journal Article
• Authors: Chen, Hongmei; Yin, Yongsheng; Deng, Honghui; Lin, Fujiang
• Other Names: Chen Chien-In Henry Academic Editor.
• Is Part Of: VLSI design. Volume 2016(2016)
• Publication Date: 2016-10-09
• Subjects: Integrated circuits -- Very large scale integration -- Periodicals; 621.395
• DOI: 10.1155/2016/6475932
• Languages: English
• ISSNs: 1065-514X

Abstract

Abstract : A low complexity all-digital background calibration technique based on statistics is proposed. The basic idea of the statistics calibration technique is that the output average energy of each channel of TIADC will be consistent ideally, since each channel samples the same input signal, and therefore the energy deviation directly reflects the mismatch errors of channels. In this work, the offset mismatch and gain mismatch are calibrated by an adaptive statistics calibration algorithm based on LMS iteration; the timing mismatch is estimated by performing the correlation calculation of the outputs of subchannels and corrected by an improved fractional delay filter based on Farrow structure. Applied to a four-channel 12-bit 400 MHz TIADC, simulation results show that, with calibration, the SNDR raises from 22.5 dB to 71.8 dB and ENOB rises from 3.4 bits to 11.6 bits for a 164.6 MHz sinusoidal input. Compared with traditional methods, the proposed schemes are more feasible to implement and consume less hardware resources.