Stepwise Transformation of Algorithms into Array Processor Architectures by the DECOMP. Issue 1 (1995)

• Record Type: Journal Article
• Authors: Vehlies, Uwe
• Is Part Of: VLSI design. Volume 3:Issue 1(1995)
• Page Start: 67
• Page End: 80
• Publication Date: 1995
• Subjects: Computer-Aided Synthesis -- Synthesis Algorithms -- CAD for Architecture Design -- Stepwise Transformation -- Mapping Methodology -- Data Independent Algorithms -- Run Time Protocol -- Nonregular Dependence Graphs -- Array-Processor Architectures; Integrated circuits -- Very large scale integration -- Periodicals; 621.395
• DOI: 10.1155/1995/76861
• Languages: English
• ISSNs: 1065-514X

Abstract

Abstract : A formal approach for the transformation of computation intensive digital signal processing algorithms into suitable array processor architectures is presented. It covers the complete design flow from algorithmic specifications in a high-level programming language to architecture descriptions in a hardware description language. The transformation itself is divided into manageable design steps and implemented in the CAD-tool DECOMP which allows the exploration of different architectures in a short time. With the presented approach data independent algorithms can be mapped onto array processor architectures. To allow this, a known mapping methodology for array processor design is extended to handle inhomogeneous dependence graphs with nonregular data dependences. The implementation of the formal approach in the DECOMP is an important step towards design automation for massively parallel systems.