Three-dimensional simulation of threshold voltage variations due to an oblique single grain boundary in sub-40 nm polysilicon nanowire FETs. (16th July 2015)

• Record Type: Journal Article
• Authors: Kim, Jungsik; Oh, Hyeongwan; Lee, Junyoung; Baek, Chang-Ki; Meyyappan, M; Lee, Jeong-Soo
• Is Part Of: Semiconductor science and technology. Volume 30:Number 8(2015:Aug.)
• Publication Date: 2015-07-16
• Subjects: polysilicon channel -- grain boundary -- TCAD simulation; Semiconductors -- Periodicals; 621.38152
• DOI: 10.1088/0268-1242/30/8/085015
• Languages: English
• ISSNs: 0268-1242

Abstract

Abstract: We perform a comparative study of the threshold voltage ( V th ) variation between inversion-mode and junctionless nanowire devices with oblique single grain boundary (o-SGB) in a sub-40 nm poly-silicon (Poly-Si) channel using 3D simulation. The V th variation due to the o-SGB becomes significant as the devices scale down to 20 nm where the o-SGB can fully affect the whole channel potential. In addition, due to relatively less flat energy band in the channel, the junctionless Poly-Si nanowire devices show larger V th variation compared with the inversion-mode devices.