Back-gate effects and mobility characterization in junctionless transistor. (November 2016)

• Record Type: Journal Article
• Authors: Parihar, Mukta Singh; Liu, Fanyu; Navarro, Carlos; Barraud, Sylvain; Bawedin, Maryline; Ionica, Irina; Kranti, Abhinav; Cristoloveanu, Sorin
• Is Part Of: Solid-state electronics. Volume 125(2016)
• Page Start: 154
• Page End: 160
• Publication Date: 2016-11
• Subjects: Mobility -- Junctionless -- Back channel -- Coupling -- SOI-MOSFETs; Semiconductors -- Periodicals; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.sse.2016.07.016
• Languages: English
• ISSNs: 0038-1101

Abstract

Abstract: This work addresses the effect of inter-gate coupling on back-channel characteristics of planar accumulation-mode junctionless (JL) MOSFETs, fabricated with advanced Fully Depleted Silicon-on-Insulator (FDSOI) technology. A systematic methodology to extract and distinguish the contributions of bulk and accumulation-mode mobility has been developed. Front-gate voltage strongly controls the transport properties of back channel in ultra-thin heavily doped JL devices. It is demonstrated that both volume and accumulation-layer mobility values increase when the front interface is in accumulation.