Array-level stability enhancement of 50 nm AlxOy ReRAM. (December 2015)

• Record Type: Journal Article
• Authors: Iwasaki, Tomoko Ogura; Ning, Sheyang; Yamazawa, Hiroki; Takeuchi, Ken
• Is Part Of: Solid-state electronics. Volume 114(2015)
• Page Start: 1
• Page End: 8
• Publication Date: 2015-12
• Subjects: ReRAM -- Stability -- Fix -- Stability verify -- Random telegraph noise; Semiconductors -- Periodicals; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.sse.2015.06.013
• Languages: English
• ISSNs: 0038-1101

Abstract

Highlights: Read stability in ReRAM is a fundamental issue caused by random telegraph noise (RTN), disturb and retention. Array-level measurements of 50 nm Al x O y indicate instability is intrinsic and not yield-dependent. The circuit technique of stability check loop is proposed to improve read stability by using a stability verify procedure. Measured results show 7× instability improvement and 40% read error rate reduction. Abstract: ReRAM's low voltage and low current programmability are attractive features to solve the scaling issues of conventional floating gate Flash. However, read instability in ReRAM is a critical issue, due to random telegraph noise (RTN), sensitivity to disturb and retention. In this work, the array-level characteristics of read stability in 50 nm Al x O y ReRAM are investigated and a circuit technique to improve stability is proposed and evaluated. First, in order to quantitatively assess memory cell stability, a method of stability characterization is defined. Next, based on this methodology, a proposal to improve read stability, called "stability check loop" is evaluated. The stability check loop is a stability verification procedure, by which, instability improvement of 7×, and read error rate improvement of 40% are obtained.