Comparative analysis of the intrinsic voltage gain and unit gain frequency between SOI and bulk FinFETs up to high temperatures. (September 2016)

• Record Type: Journal Article
• Authors: Oliveira, Alberto Vinicius de; Agopian, Paula Ghedini Der; Martino, Joao Antonio; Simoen, Eddy; Claeys, Cor; Collaert, Nadine; Thean, Aaron
• Is Part Of: Solid-state electronics. Volume 123(2016)
• Page Start: 124
• Page End: 129
• Publication Date: 2016-09
• Subjects: Bulk pFinFET -- SOI pFinFET -- High temperature -- Analog parameters; Semiconductors -- Periodicals; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.sse.2016.05.004
• Languages: English
• ISSNs: 0038-1101

Abstract

Highlights: Performance comparison between silicon triple gate bulk and SOI pFinFET devices. Experimental analysis of the analog application figures of merit at high temperature. The intrinsic voltage gain and unit gain frequency are evaluated from 25 °C to 150 °C. Influence and different channel lengths and fin widths were also taken into account. While the narrow devices seem to be the better option for optimizing AV . The wider devices are more suitable for improved fT performance. Abstract: This paper presents an experimental analysis of the analog application figures of merit: the intrinsic voltage gain ( AV ) and unit gain frequency, focusing on the performance comparison between silicon triple gate pFinFET devices, which were processed on both Si and Silicon-On-Insulator (SOI) substrates. The high temperature (from 25 °C to 150 °C) influence and different channel lengths and fin widths were also taken into account. While the temperature impact on the intrinsic voltage gain ( AV ) is limited, the unit gain frequency was strongly affected due to the carrier mobility degradation at higher temperatures, for both p- and n-type FinFET structures. In addition, the pFinFETs showed slightly larger AV values compared to the n-type counterparts, whereby the bulk FinFETs presented a higher dispersion than the SOI FinFETs.