Integration of GMR-based spin torque oscillators and CMOS circuitry. (September 2015)
- Record Type:
- Journal Article
- Title:
- Integration of GMR-based spin torque oscillators and CMOS circuitry. (September 2015)
- Main Title:
- Integration of GMR-based spin torque oscillators and CMOS circuitry
- Authors:
- Chen, Tingsu
Eklund, Anders
Sani, Sohrab
Rodriguez, Saul
Malm, B. Gunnar
Åkerman, Johan
Rusu, Ana - Abstract:
- Highlights: Comprehensive considerations to select a suitable integration approach for GMR STOs. Complete system to achieve GMR STO–CMOS integration using a wire-bonding approach. A 17 GHz on-chip bias-tee with a maximum DC current handling capacity of 23 mA. An ESD-protected IC with 12 dB gain, covering 9–15 GHz of GMR STO's frequency range. The system improves GMR STO's output power and eliminates wave reflections. Abstract: This paper demonstrates the integration of giant magnetoresistance (GMR) spin torque oscillators (STO) with dedicated high frequency CMOS circuits. The wire-bonding-based integration approach is employed in this work, since it allows easy implementation, measurement and replacement. A GMR STO is wire-bonded to the dedicated CMOS integrated circuit (IC) mounted on a PCB, forming a (GMR STO + CMOS IC) pair. The GMR STO has a lateral size of 70 nm and more than an octave of tunability in the microwave frequency range. The proposed CMOS IC provides the necessary bias-tee for the GMR STO, as well as electrostatic discharge (ESD) protection and wideband amplification targeting high frequency GMR STO-based applications. It is implemented in a 65 nm CMOS process, offers a measured gain of 12 dB, while consuming only 14.3 mW and taking a total silicon area of 0.329 mm 2 . The measurement results show that the (GMR STO + CMOS IC) pair has a wide tunability range from 8 GHz to 16.5 GHz and improves the output power of the GMR STO by about 10 dB. This GMR STO–CMOSHighlights: Comprehensive considerations to select a suitable integration approach for GMR STOs. Complete system to achieve GMR STO–CMOS integration using a wire-bonding approach. A 17 GHz on-chip bias-tee with a maximum DC current handling capacity of 23 mA. An ESD-protected IC with 12 dB gain, covering 9–15 GHz of GMR STO's frequency range. The system improves GMR STO's output power and eliminates wave reflections. Abstract: This paper demonstrates the integration of giant magnetoresistance (GMR) spin torque oscillators (STO) with dedicated high frequency CMOS circuits. The wire-bonding-based integration approach is employed in this work, since it allows easy implementation, measurement and replacement. A GMR STO is wire-bonded to the dedicated CMOS integrated circuit (IC) mounted on a PCB, forming a (GMR STO + CMOS IC) pair. The GMR STO has a lateral size of 70 nm and more than an octave of tunability in the microwave frequency range. The proposed CMOS IC provides the necessary bias-tee for the GMR STO, as well as electrostatic discharge (ESD) protection and wideband amplification targeting high frequency GMR STO-based applications. It is implemented in a 65 nm CMOS process, offers a measured gain of 12 dB, while consuming only 14.3 mW and taking a total silicon area of 0.329 mm 2 . The measurement results show that the (GMR STO + CMOS IC) pair has a wide tunability range from 8 GHz to 16.5 GHz and improves the output power of the GMR STO by about 10 dB. This GMR STO–CMOS integration eliminates wave reflections during the signal transmission and therefore exhibits good potential for developing high frequency GMR STO-based applications, which combine the features of CMOS and STO technologies. … (more)
- Is Part Of:
- Solid-state electronics. Volume 111(2015)
- Journal:
- Solid-state electronics
- Issue:
- Volume 111(2015)
- Issue Display:
- Volume 111, Issue 2015 (2015)
- Year:
- 2015
- Volume:
- 111
- Issue:
- 2015
- Issue Sort Value:
- 2015-0111-2015-0000
- Page Start:
- 91
- Page End:
- 99
- Publication Date:
- 2015-09
- Subjects:
- CMOS -- Giant magnetoresistance -- Integration -- On-chip bias-tee -- Spin torque oscillator -- Wire bonding
Semiconductors -- Periodicals
Semiconducteurs -- Périodiques
621.38152 - Journal URLs:
- http://www.sciencedirect.com/science/journal/00381101 ↗
http://www.elsevier.com/journals ↗ - DOI:
- 10.1016/j.sse.2015.05.037 ↗
- Languages:
- English
- ISSNs:
- 0038-1101
- Deposit Type:
- Legaldeposit
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - 8327.385000
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