Dual Ground Plane for high-voltage MOSFET in UTBB FDSOI technology. (October 2015)

• Record Type: Journal Article
• Authors: Litty, Antoine; Ortolland, Sylvie; Golanski, Dominique; Cristoloveanu, Sorin
• Is Part Of: Solid-state electronics. Volume 112(2015)
• Page Start: 7
• Page End: 12
• Publication Date: 2015-10
• Subjects: Semiconductors -- Periodicals; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.sse.2015.02.013
• Languages: English
• ISSNs: 0038-1101

Abstract

Abstract: For the first time, the investigation and fabrication of a high-voltage MOSFET (HVMOS) in Ultra-Thin Body and Buried oxide Fully Depleted technology (UTBB-FDSOI) is reported. Through TCAD simulations, the lateral electric field profile and related breakdown voltage behaviour are studied. Taking benefit of the FDSOI assets, an original HVMOS architecture, featuring a Dual Ground Plane, is proposed to optimize the electric field profile distribution. As a new lever for high voltage, the Dual Ground Plane enables a "RESURF-like" effect, electrostatically improving classical HVMOS figures of merit: the breakdown voltage (BV) and the specific-on resistance ( R ON .S). Experimental results confirm the potential of the Dual Ground Plane solution for HVMOS device in 28 nm UTBB-FDSOI technology and beyond.