Analysis of current mirror circuits designed with line tunnel FET devices at different temperatures. (25th April 2017)

• Record Type: Journal Article
• Authors: Martino, M D V; Martino, J A; Agopian, P G D; Vandooren, A; Rooyackers, R; Simoen, E; Claeys, C
• Is Part Of: Semiconductor science and technology. Volume 32:Number 5(2017:May)
• Publication Date: 2017-04-25
• Subjects: TFET -- FinFET -- temperature impact -- current mirror -- analog circuits; Semiconductors -- Periodicals; 621.38152
• DOI: 10.1088/1361-6641/aa6764
• Languages: English
• ISSNs: 0268-1242

Abstract

Abstract: The goal of this work is to study the performance of current mirror circuits designed with line tunnel field effect transistor (TFET) devices and compare the suitability of this technology with alternatives such as point TFETs and FinFETs. Experimental results have been obtained at room and high temperatures and the analyses focused on parameters such as the magnitude of the on-state current and the sensitivity of the current transfer ratio to channel dimensions mismatch and to the temperature. Line TFETs exhibited higher on-state current than point TFETs, in spite of a higher susceptibility to the channel length. When band-to-band tunneling prevails for both input and output transistors, the current transfer ratio with line TFETs presented a nearly linear dependence on the temperature due to bandgap narrowing. This way, a general equation of the current transfer ratio for circuits designed with the three highlighted technologies is proposed. Globally, it was observed that, unless a very low sensitivity to channel length mismatch is required, line TFET devices are a very suitable alternative for current mirror circuits, since this technology provides much higher on-state currents than point TFETs, and at the same time it is much less sensitive to temperature variations than FinFET transistors.