Single-event burnout hardening of planar power MOSFET with partially widened trench source *Project supported by the National Natural Science Foundation of China (Nos. 61404161, 61404068, 61404169). (March 2018)

• Record Type: Journal Article
• Authors: Lu, Jiang; Liu, Hainan; Cai, Xiaowu; Luo, Jiajun; Li, Bo; Li, Binhong; Wang, Lixin; Han, Zhengsheng
• Is Part Of: Journal of semiconductors. Volume 39:Number 3(2018:Mar.)
• Publication Date: 2018-03
• Subjects: planar power MOSFETs -- single-event burnout (SEB) -- parasitic bipolar transistor -- second breakdown voltage; 85.30.De -- 85.30.Tv; 2550R -- 2560 -- 2560P; Semiconductors -- Periodicals; 621.38152
• DOI: 10.1088/1674-4926/39/3/034003
• Languages: English
• ISSNs: 1674-4926

Abstract

Abstract: We present a single-event burnout (SEB) hardened planar power MOSFET with partially widened trench sources by three-dimensional (3D) numerical simulation. The advantage of the proposed structure is that the work of the parasitic bipolar transistor inherited in the power MOSFET is suppressed effectively due to the elimination of the most sensitive region (P-well region below the N + source). The simulation result shows that the proposed structure can enhance the SEB survivability significantly. The critical value of linear energy transfer (LET), which indicates the maximum deposited energy on the device without SEB behavior, increases from 0.06 to 0.7 pC/ μ m. The SEB threshold voltage increases to 120 V, which is 80% of the rated breakdown voltage. Meanwhile, the main parameter characteristics of the proposed structure remain similar with those of the conventional planar structure. Therefore, this structure offers a potential optimization path to planar power MOSFET with high SEB survivability for space and atmospheric applications.