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An isolated SNM model for high-stability multi-port register file in 65 nm CMOS *Project supported by the National Natural Science Foundation of China (Nos, 61404076, 61474068), the Zhejiang Provincial Natural Science Foundation of China (No. LQ14F040001), the S&T Plan of Zhejiang Provincial Science and Technology Department (No. 2015C31010), the China Spark Program (No. 2015GA701053), the Ningbo Natural Science Foundation (Nos. 2014A610148, 2015A610107), and the K. C. Wong Magna Fund in Ningbo University, China. (September 2017)
Record Type:
Journal Article
Title:
An isolated SNM model for high-stability multi-port register file in 65 nm CMOS *Project supported by the National Natural Science Foundation of China (Nos, 61404076, 61474068), the Zhejiang Provincial Natural Science Foundation of China (No. LQ14F040001), the S&T Plan of Zhejiang Provincial Science and Technology Department (No. 2015C31010), the China Spark Program (No. 2015GA701053), the Ningbo Natural Science Foundation (Nos. 2014A610148, 2015A610107), and the K. C. Wong Magna Fund in Ningbo University, China. (September 2017)
Main Title:
An isolated SNM model for high-stability multi-port register file in 65 nm CMOS *Project supported by the National Natural Science Foundation of China (Nos, 61404076, 61474068), the Zhejiang Provincial Natural Science Foundation of China (No. LQ14F040001), the S&T Plan of Zhejiang Provincial Science and Technology Department (No. 2015C31010), the China Spark Program (No. 2015GA701053), the Ningbo Natural Science Foundation (Nos. 2014A610148, 2015A610107), and the K. C. Wong Magna Fund in Ningbo University, China.
Abstract: In modern microprocessors, the multi-port register file is one of the key modules which provides fast and multiple data access for instructions. As the number of access ports in register files increases, stability becomes a key issue due to the voltage fluctuation on bit lines. We propose to apply an isolated inverter to address the voltage fluctuation. To assess the register stability, we derive a closed-form expression of static noise margin (SNM) for our register file. The proposed SNM model can be used as a guideline to predict the impact of several register parameters on the stability and optimize register file designs. To validate the proposed SNM model, we fabricated a test chip of two-write-four-read (2W4R) 1024 bits register file in a TSMC 65 nm low-power CMOS technology. The experimental result shows that the stability of our register file cells with an isolated inverter improve the conventional cells by approximately 2.4 times. Also, the supply voltage causes a fluctuation of SNM of about 65%, while temperature and transistor mismatch cause a fluctuation of SNM of about 20%.