A 4 Gbps current-mode transmitter for 12-bit 250 MSPS ADC *Project supported by the National Science Foundation of China (No. 61474092) and Key Project of Natural Science of Anhui Provincial Department of Education (No. KJ2017A396). (August 2017)

• Record Type: Journal Article
• Authors: Chen, Zhenhai; Yu, Zongguang; Wei, Jinghe; Zhou, Dejin; Su, Xiaobo; Zou, Jiaxuan
• Is Part Of: Journal of semiconductors. Volume 38:Number 8(2017:Aug.)
• Publication Date: 2017-08
• Subjects: interface -- pipelined ADC -- transmitter -- current mode; 2570; Semiconductors -- Periodicals; 621.38152
• DOI: 10.1088/1674-4926/38/8/085008
• Languages: English
• ISSNs: 1674-4926

Abstract

Abstract: A 4 Gbps transmitter for a 12-bit 250 MSPS pipelined ADCs is presented. A low power current mode (CM) output driver with reverse scaling technique is proposed. A high speed, low power combined serializer is implemented to convert 12 bit parallel data into a seria1 data stream. The whole transmitter is used in a 12-bit 250 MSPS pipelined ADC for the digital output buffer and fabricated in 180 nm 1. 8 V 1P5M CMOS technology. Test results show that the transmitter provides an eye height greater than 800 mV for data rates of both 2 Gbps and 4 Gbps, the 12-bit 250 MSPS ADC achieves the SNR of 69.92 dBFS and SFDR of 81.17 dB with 20.1 MHz input at full sampling speed. The ADC with the 4 Gbps transmitter consumes the power consumption of 395 mW, where the power consumption of transmitter is 75 mW. The ADC occupies an area of 2.5 × 3.2 mm 2, where the active area of the transmitter block is 0.5 × 1.2 mm 2 .