A high-accuracy DCO with hybrid architecture*Project supported by the National Natural Science Foundation of China (Nos. 61306025, 61474135). (July 2017)

• Record Type: Journal Article
• Authors: Sun, Yapeng; Zhao, Huidong; Qiao, Shushan; Hei, Yong; Zhang, Fuhai
• Is Part Of: Journal of semiconductors. Volume 38:Number 7(2017:Jul.)
• Publication Date: 2017-07
• Subjects: high accuracy DCO -- all-digital -- PVT variations; 2570; Semiconductors -- Periodicals; 621.38152
• DOI: 10.1088/1674-4926/38/7/075004
• Languages: English
• ISSNs: 1674-4926

Abstract

Abstract: In this paper, a novel hybrid digital-controlled oscillator (DCO) is proposed, which is used to improve the accuracy of the all-digital clock generator without reference source. The DCO with hybrid architecture consists of two parts: DCO_high and DCO_low. The DCO_high decides the coarse output frequency of DCO, and adopts the cascade structure to decrease the area. The DCO_low adopts the chain structure with three-state buffer, and decides the fine output frequency of DCO. Compared with traditional cascade DCO, the proposed hybrid DCO features higher precision with less inherent delay. Therefore the clock generator can tolerate process, voltage and temperature (PVT) variation and meet the needs of different conditions. The DCO is designed in SMIC 180 nm CMOS process with 0.021 mm 2 chip area. The output frequency is adjusted from 15–120 MHz. The frequency error is less than 0.83% at 25 MHz with 1.6–1.8 V supply voltage and 0–80 °C temperature variations in TT, FF, SS corners.