Atomic layer deposition deposited high dielectric constant (κ) ZrAlOx gate insulator enabling high performance ZnSnO thin film transistors. (September 2017)

• Record Type: Journal Article
• Authors: Huang, Chuan-Xin; Li, Jun; Zhong, De-Yao; Zhao, Cheng-Yu; Zhu, Wen-Qing; Zhang, Jian-Hua; Jiang, Xue-Yin; Zhang, Zhi-Lin
• Is Part Of: Superlattices and microstructures. Volume 109(2017)
• Page Start: 852
• Page End: 859
• Publication Date: 2017-09
• Subjects: Atomic layer deposition -- ZrAlOx gate insulator -- ZTO TFTs -- PBS stability; Superlattices as materials -- Periodicals; Microstructure -- Periodicals; Semiconductors -- Periodicals; Superréseaux -- Périodiques; Microstructure (Physique) -- Périodiques; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.spmi.2017.06.011
• Languages: English
• ISSNs: 0749-6036

Abstract

Abstract: The high κ ZrAlOx gate insulators were deposited by atomic layer deposition on silicon and characterized by the different analytical techniques. The grazing incidence X-ray diffraction (GIXRD) verifies that ZrAlOx thin films show an amorphous structure. The X-ray photoelectron spectroscopy (XPS) confirms that the form of ZrAlOx phase improves the electrical properties and stability of the associated devices. Then, all ZrAlOx thin films were integrated in metal-insulator-semiconductor structures to check the electrical capabilities. They all show a low leakage current density (about 1 × 10 −8 A/cm 2 ) under a high electric field of about 2.0 MV/cm, and exhibit a stable capacitance as a function of frequency. Their associated ZTO TFTs were deposited by a radio frequency sputtering, and the influence of the ZrAlOx thickness on the stabilities under positive bias stress and electrical properties is investigated. The 130 nm ZrAlOx based TFT shows the optimized electrical properties (its mobility, threshold voltage, sub-threshold voltage swing and on-off ratio are 12.5 cm 2 /V, 0.3 V, 0.15 V/dec. and 8 × 10 7 and the good stability with 2.5 V threshold voltage shift under the positive bias voltage stress. The better properties of 130 nm ZrAlOx based TFTs are attributed to a less interface trap states and surface scattering center. Highlights: The novel high κ ZrAlOx gate insulator. The atomic layer deposition technique. The ZnSnO thin film transistors. The stability under positive gate voltage bias stress.