Endurance degradation and lifetime model of p-channel floating gate flash memory device with 2T structure. (August 2017)

• Record Type: Journal Article
• Authors: Wei, Jiaxing; Liu, Siyang; Liu, Xiaoqiang; Sun, Weifeng; Liu, Yuwei; Liu, Xiaohong; Hou, Bo
• Is Part Of: Solid-state electronics. Volume 134(2017)
• Page Start: 58
• Page End: 64
• Publication Date: 2017-08
• Subjects: p-Channel flash memory -- Floating gate -- Endurance degradation -- Lifetime model; Semiconductors -- Periodicals; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.sse.2017.05.011
• Languages: English
• ISSNs: 0038-1101

Abstract

Highlights: Comprehensive endurance degradations of 2T p-channel flash device are investigated. CP measurements are performed to detect damages of the p-channel flash device firstly. Macroscopic Vtp degradation is proved to match the microscopic tunnel oxide degradation. The endurance lifetime model for the flash device is extracted. Abstract: The endurance degradation mechanisms of p-channel floating gate flash memory device with two-transistor (2T) structure are investigated in detail in this work. With the help of charge pumping (CP) measurements and Sentaurus TCAD simulations, the damages in the drain overlap region along the tunnel oxide interface caused by band-to-band (BTB) tunneling programming and the damages in the channel region resulted from Fowler-Nordheim (FN) tunneling erasure are verified respectively. Furthermore, the lifetime model of endurance characteristic is extracted, which can extrapolate the endurance degradation tendency and predict the lifetime of the device.