Improving the electrical and hysteresis performance of amorphous igzo thin-film transistors using co-sputtered zirconium silicon oxide gate dielectrics. (15th August 2017)

• Record Type: Journal Article
• Authors: Hung, Chien-Hsiung; Wang, Shui-Jinn; Liu, Pang-Yi; Wu, Chien-Hung; Yan, Hao-Ping; Wu, Nai-Sheng; Lin, Tseng-Hsing
• Is Part Of: Materials science in semiconductor processing. Volume 67(2017)
• Page Start: 84
• Page End: 91
• Publication Date: 2017-08-15
• Subjects: Indium gallium zinc oxide -- Co-sputtering, high-κ dielectric -- Thin-film transistor -- Zirconium silicon oxide -- Interface trap density; Semiconductors -- Periodicals; Integrated circuits -- Materials -- Periodicals; Semiconducteurs -- Périodiques; Circuits intégrés -- Matériaux -- Périodiques; Electronic journals; 621.38152
• DOI: 10.1016/j.mssp.2017.05.017
• Languages: English
• ISSNs: 1369-8001

Abstract

Abstract: The use of co-sputtered Zirconium Silicon Oxide (Zrx Si1−x O2 ) gate dielectrics to improve the performance of α-IGZO TFT is demonstrated. Through modulating the sputtering power of the SiO2 and ZrO2 targets, the control of dielectric constant in a range of 6.9–31.6 is shown. Prevention of polycrystalline formation of the Zrx Si1−x O2 film up to 600 °C annealing and its effectiveness in reducing leakage currents and interface trap density are presented. Moreover, it is revealed that the Zr0.85 Si0.15 O2 dielectric could lead to significantly improved TFT performance in terms of subthreshold swing (SS=81 mV/dec), field-effect mobility (μFE =51.7 cm 2 /Vs), and threshold voltage shift (ΔVTH =0.03 V).