Bias Temperature Instability (BTI) in high-mobility channel devices with high-k dielectric stacks: SiGe, Ge, and InGaAs. Issue 49 (23rd May 2016)

• Record Type: Journal Article
• Authors: Franco, J.; Kaczer, B.; Vais, A.; Alian, A.; Arimura, H.; Putcha, V.; Sioncke, S.; Waldron, N.; Zhou, D.; Nyns, L.; Mitard, J.; Witters, L.; Heyns, M.; Groeseneken, G.; Collaert, N.; Linten, D.; Thean, A.
• Is Part Of: MRS advances. Volume 1:Issue 49(2016)
• Page Start: 3329
• Page End: 3340
• Publication Date: 2016-05-23
• Subjects: Si, -- Ge, -- III-V; Electrical engineering -- Congresses; Physics -- Congresses; Materials -- Research -- Congresses; Materials science -- Congresses; 620.11
• DOI: 10.1557/adv.2016.387
• Languages: English
• ISSNs: 2059-8521

Abstract

ABSTRACT: We present a review of our recent studies of Bias Temperature Instability (BTI) in Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs) fabricated with different material systems, highlighting the reliability opportunities and challenges of each novel device family. We discuss first the intrinsic reliability improvement offered by SiGe and Ge p -channel technologies, if a Si cap is used to passivate the channel, in order to fabricate a standard SiO2 /HfO2 gate stack. We focus on SiGe gate stack optimizations for maximum BTI reliability, and on a simple physics-based model able to reproduce the experimental trends. This model framework is then used to understand the suboptimal BTI reliability and excessive time-dependent variability induced by oxide defect charging in different high-mobility channel gate stacks, such as Ge/GeOx /high-k and InGaAs/high-k. Finally we discuss how to pursue a reduction of charge trapping in alternative material systems in order to boost the device reliability and minimize time-dependent variability.