Analytical parameter extraction for NBTI reaction diffusion and trapping/detrapping models. (November 2016)

• Record Type: Journal Article
• Authors: Wang, YanLing; Li, XiaoJin; Qing, Jian; Zeng, Yan; Shi, YanLing; Guo, Ao; Hu, ShaoJian; Chen, Shoumian; Zhao, Yuhang
• Is Part Of: Microelectronics and reliability. Volume 66(2016)
• Page Start: 10
• Page End: 15
• Publication Date: 2016-11
• Subjects: Negative bias temperature instability (NBTI) -- Reaction-diffusion (R-D) model -- Trapping/detrapping (T/D) model -- Parameter extraction -- Genetic algorithm -- Coordinate system conversion; Electronic apparatus and appliances -- Reliability -- Periodicals; Miniature electronic equipment -- Periodicals; Appareils électroniques -- Fiabilité -- Périodiques; Équipement électronique miniaturisé -- Périodiques; Electronic apparatus and appliances -- Reliability; Miniature electronic equipment; Periodicals; 621.3815
• DOI: 10.1016/j.microrel.2016.10.005
• Languages: English
• ISSNs: 0026-2714

Abstract

Abstract: Accurate parameters of negative bias temperature instability (NBTI) model are essential to predict the circuit lifetime during circuit design. This paper presents the extraction methods of NBTI model parameters for the NBTI reaction-diffusion (R-D) and trapping/detrapping (T/D) models. The R-D model parameters extraction mainly includes two steps: linear approximation and optimized extraction. In the first step, the term of Δ V th 1/2 n is described as approximately linear with t 0.5 after the coordinate system conversion, where Δ V th is the degradation in threshold voltage and t is elapsing time. Then, the model parameters can be roughly calculated. In the second, an objective function of the genetic algorithm (GA) has been built up and its constraints can be determined by referring the values gotten from the first step. After solving the function, a set of accurate parameters of the NBTI model can be achieved. Similarly, the T/D model parameters extraction involves the curves fitting and further optimization based on the GA. Both the R-D and T-D extraction methods have been validated using a 40-nm CMOS process, and it is easy to implement the extraction procedures in a program extractor.