A 70.4 dB voltage gain, 2.3 dB NF, fully integrated multi-standard UHF receiver front-end in CMOS 130-nm. (June 2016)

• Record Type: Journal Article
• Authors: Júnior, Carlos A.M. Costa; Filho, José B. Sales; Cunha, Gabriel C.L.; Belfort, Diomadson R.; Catunda, Sebastian Y.C.; de Lima, Robson N.; Bourguet, Vincent P.M.
• Is Part Of: Microelectronics journal. Volume 52(2016)
• Page Start: 1
• Page End: 10
• Publication Date: 2016-06
• Subjects: ARGOS -- SBCDA -- UHF receiver -- CMOS -- LNA -- Mixer -- Quadrature; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2016.03.001
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: The design of a fully integrated multi-standard UHF receiver front-end to be embedded in environmental data collection satellites is proposed. The circuit operates under the requirements of both SBCDA and the ARGOS 3. For that, the specifications of a multi-standard receiver front-end are firstly derived and then the implementation of a 70.4 dB voltage gain, 2.3 dB NF, 48 mW energy consumption, single-ended input and differential quadrature output receiver front-end in 130-nm CMOS standard technology is presented. The design is validated through post-layout simulation.